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ROCKPro64 - Übersicht

Angeheftet Verschoben Hardware

  • ROCKPro64 - Anpassen resize_rootfs.sh

    Angeheftet ROCKPro64
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    FrankMF

    Seit Release 0.10.10 ist das automatische Vergrößern der Root Partition mit drin 🙂

    0.10.10: Support automated resize when booting from nvme

    Einfach das Image auf die NVMe SSD schreiben, ab in den ROCKPro64 und fertig! Nach dem Booten wird die Partition dann automatisch auf die maximal mögliche Größe erweitert.

    Kamil hat das Script auch ein wenig angepasst.

    case $dev in /dev/mmcblk?p?) DISK=${dev:0:12} PART=${dev:13} NAME="sd/emmc" ;; /dev/sd??) DISK=${dev:0:8} PART=${dev:8} NAME="hdd/ssd" ;; /dev/nvme?n?p?) DISK=${dev:0:12} PART=${dev:13} NAME="pcie/nvme" ;;

    Das Resultat bei einer Samsung 979 EVO mit 500GB Speicher

    rock64@rockpro64:~$ df -h Filesystem Size Used Avail Use% Mounted on udev 918M 0 918M 0% /dev tmpfs 192M 5.2M 187M 3% /run /dev/nvme0n1p4 459G 1.2G 439G 1% / tmpfs 957M 0 957M 0% /dev/shm tmpfs 5.0M 4.0K 5.0M 1% /run/lock tmpfs 957M 0 957M 0% /sys/fs/cgroup /dev/nvme0n1p3 229M 44M 169M 21% /boot /dev/nvme0n1p2 12M 0 12M 0% /boot/efi tmpfs 192M 0 192M 0% /run/user/1000

    Perfekt. Danke Kamil!

  • ROCKPro64 - WLan-Antennen

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  • ROCKPro64 - Kernel switchen

    Verschoben ROCKPro64
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  • Booten von der NVMe Platte

    ROCKPro64
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    S

    Für dies Kernal: Linux rockpro64 4.4.167-1213-rockchip-ayufan-g34ae07687fce #1 SMP Tue Jun 18 20:44:49 UTC 2019 aarch64 GNU/Linux

    Booten von der NVMe Platte nicht möglich.

    Ich folgte die folgende Schritte. Leider funktioniert es nicht. Es gibt einen Fehler in Boot.

    Ohne RAID oder LVM config.

    Specs:
    Rockpro64
    Marvel PCIe 88se9230 karte
    SANDISK SSD 120 GB

  • Benchmark Script

    ROCKPro64
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    FrankMF
    Mainline

    Mein gekürztes Ergebnis auf einem ROCKPro64 v2.0 mit 4GB RAM und 4.18er Kernel, dieser ROCK benutzt eine SD-Karte!

    Gekürzt

    Distributor ID: Ubuntu Description: Ubuntu 18.04.1 LTS Release: 18.04 Codename: bionic Architecture: arm64 Uptime: 16:14:56 up 4 min, 1 user, load average: 0.08, 0.02, 0.01 Linux 4.18.0-rc5-1048-ayufan-g69e417fe38cf (rockpro64) 07/27/18 _aarch64_ (6 CPU) avg-cpu: %user %nice %system %iowait %steal %idle 0.54 0.00 0.74 0.39 0.00 98.33 Device tps kB_read/s kB_wrtn/s kB_read kB_wrtn mmcblk0 20.63 634.58 48.26 168380 12804 nvme0n1 0.14 4.01 0.00 1064 0 total used free shared buff/cache available Mem: 3.8G 241M 3.4G 19M 201M 3.5G Swap: 0B 0B 0B ##########################################################################

    Komplett -> http://ix.io/1ix7

  • Image 0.6.57 - NVMe paar Notizen

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  • stretch-minimal-rockpro64

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    FrankMF

    Mal ein Test was der Speicher so kann.

    rock64@rockpro64:~/tinymembench$ ./tinymembench tinymembench v0.4.9 (simple benchmark for memory throughput and latency) ========================================================================== == Memory bandwidth tests == == == == Note 1: 1MB = 1000000 bytes == == Note 2: Results for 'copy' tests show how many bytes can be == == copied per second (adding together read and writen == == bytes would have provided twice higher numbers) == == Note 3: 2-pass copy means that we are using a small temporary buffer == == to first fetch data into it, and only then write it to the == == destination (source -> L1 cache, L1 cache -> destination) == == Note 4: If sample standard deviation exceeds 0.1%, it is shown in == == brackets == ========================================================================== C copy backwards : 2812.7 MB/s C copy backwards (32 byte blocks) : 2811.9 MB/s C copy backwards (64 byte blocks) : 2632.8 MB/s C copy : 2667.2 MB/s C copy prefetched (32 bytes step) : 2633.5 MB/s C copy prefetched (64 bytes step) : 2640.8 MB/s C 2-pass copy : 2509.8 MB/s C 2-pass copy prefetched (32 bytes step) : 2431.6 MB/s C 2-pass copy prefetched (64 bytes step) : 2424.1 MB/s C fill : 4887.7 MB/s (0.5%) C fill (shuffle within 16 byte blocks) : 4883.0 MB/s C fill (shuffle within 32 byte blocks) : 4889.3 MB/s C fill (shuffle within 64 byte blocks) : 4889.2 MB/s --- standard memcpy : 2807.3 MB/s standard memset : 4890.4 MB/s (0.3%) --- NEON LDP/STP copy : 2803.7 MB/s NEON LDP/STP copy pldl2strm (32 bytes step) : 2802.1 MB/s NEON LDP/STP copy pldl2strm (64 bytes step) : 2800.7 MB/s NEON LDP/STP copy pldl1keep (32 bytes step) : 2745.5 MB/s NEON LDP/STP copy pldl1keep (64 bytes step) : 2745.8 MB/s NEON LD1/ST1 copy : 2801.9 MB/s NEON STP fill : 4888.9 MB/s (0.3%) NEON STNP fill : 4850.1 MB/s ARM LDP/STP copy : 2803.8 MB/s ARM STP fill : 4893.0 MB/s (0.5%) ARM STNP fill : 4851.7 MB/s ========================================================================== == Framebuffer read tests. == == == == Many ARM devices use a part of the system memory as the framebuffer, == == typically mapped as uncached but with write-combining enabled. == == Writes to such framebuffers are quite fast, but reads are much == == slower and very sensitive to the alignment and the selection of == == CPU instructions which are used for accessing memory. == == == == Many x86 systems allocate the framebuffer in the GPU memory, == == accessible for the CPU via a relatively slow PCI-E bus. Moreover, == == PCI-E is asymmetric and handles reads a lot worse than writes. == == == == If uncached framebuffer reads are reasonably fast (at least 100 MB/s == == or preferably >300 MB/s), then using the shadow framebuffer layer == == is not necessary in Xorg DDX drivers, resulting in a nice overall == == performance improvement. For example, the xf86-video-fbturbo DDX == == uses this trick. == ========================================================================== NEON LDP/STP copy (from framebuffer) : 602.5 MB/s NEON LDP/STP 2-pass copy (from framebuffer) : 551.6 MB/s NEON LD1/ST1 copy (from framebuffer) : 667.1 MB/s NEON LD1/ST1 2-pass copy (from framebuffer) : 605.6 MB/s ARM LDP/STP copy (from framebuffer) : 445.3 MB/s ARM LDP/STP 2-pass copy (from framebuffer) : 428.8 MB/s ========================================================================== == Memory latency test == == == == Average time is measured for random memory accesses in the buffers == == of different sizes. The larger is the buffer, the more significant == == are relative contributions of TLB, L1/L2 cache misses and SDRAM == == accesses. For extremely large buffer sizes we are expecting to see == == page table walk with several requests to SDRAM for almost every == == memory access (though 64MiB is not nearly large enough to experience == == this effect to its fullest). == == == == Note 1: All the numbers are representing extra time, which needs to == == be added to L1 cache latency. The cycle timings for L1 cache == == latency can be usually found in the processor documentation. == == Note 2: Dual random read means that we are simultaneously performing == == two independent memory accesses at a time. In the case if == == the memory subsystem can't handle multiple outstanding == == requests, dual random read has the same timings as two == == single reads performed one after another. == ========================================================================== block size : single random read / dual random read 1024 : 0.0 ns / 0.0 ns 2048 : 0.0 ns / 0.0 ns 4096 : 0.0 ns / 0.0 ns 8192 : 0.0 ns / 0.0 ns 16384 : 0.0 ns / 0.0 ns 32768 : 0.0 ns / 0.0 ns 65536 : 4.5 ns / 7.2 ns 131072 : 6.8 ns / 9.7 ns 262144 : 9.8 ns / 12.8 ns 524288 : 11.4 ns / 14.7 ns 1048576 : 16.0 ns / 22.6 ns 2097152 : 114.0 ns / 175.3 ns 4194304 : 161.7 ns / 219.9 ns 8388608 : 190.7 ns / 241.5 ns 16777216 : 205.3 ns / 250.5 ns 33554432 : 212.9 ns / 255.5 ns 67108864 : 222.3 ns / 271.1 ns
  • Serielle Konsole UART2

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    FrankMF

    Ich verweise mal auf einen Artikel auf einer Webseite von mir, der Einsteiger Niveau hat.
    https://frank-mankel.de/wichtig/serielle-konsole

    Wenn es dann noch Probleme gibt, einfach fragen.

    Und beachte bitte, das wir hier nicht über PIs schreiben, sondern über ROCKPros. Da könnte es kleine Unterschiede geben. https://www.raspberrypi.org/documentation/configuration/uart.md