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ROCKPro64 - PCIe x4

Verschoben Hardware
  • Bis jetzt funktioniert das PCIe in den aktuellen Boards noch nicht.

    Aufpassen, wir haben hier ganz taufrische Boards auch Preproduction genannt in den Händen.

    Wir sind dafür da, die Fehler auszubügeln. 😉

    Es sieht wohl so aus, das die 3,3V irgendwie die Karte nicht erreichen. Man hat aber in der Technik nach dem Fehler gesucht und auch gefunden. Es scheint so zu sein, das ein Widerstand im Weg rum steht. Soll sich aber lösen lassen.

    Hier ein Video aus der technischen Abteilung, der zeigt das der Bus funktioniert.

    Ach so, hatte ich schon erwähnt, das die Unternehmenskommunikation mit ihren Kunden und Entwicklern bis jetzt 1A ist?

    0_1527522362296_pcie.png

    Ich weiß welcher Widerstand, aber ich trau mich nicht ....

  • Bin jetzt bei einem Fachmann, Mal hoffen das das Ding danach noch lebt 😀

    Update: Leuchte auf der PCIe-Karte ist AN 😀

  • Leider kackt der Kernel jetzt mit der NVMe-Karte ab 😞

    Mal auf Kamil warten und schauen was er dazu sagt.

  • So, nachdem Lukasz geschrieben hat das seine SATA-Karte mit zwei HDD's funktioniert habe ich mich nochmal ran gemacht.

    0_1528392919816_pcie_sata.jpg

    Linux-Version:

    rock64@rockpro64:~$ uname -a
    
    Linux rockpro64 4.4.126-rockchip-ayufan-253 #1 SMP Mon Jun 4 08:47:16 UTC 2018 aarch64 aarch64 aarch64 GNU/Linux
    

    lspci

    rock64@rockpro64:~$ lspci
    00:00.0 PCI bridge: Rockchip Inc. RK3399 PCI Express Root Port Device 0100
    01:00.0 SATA controller: ASMedia Technology Inc. ASM1062 Serial ATA Controller (rev 02)
    

    Ok, ich sehe die PCI Brücke und meinen Adapter der an einem externen eSATA Port angeschlossen ist.

    Meine Aussage aus dem Eingangspost

    Das jetzt ist eine Vermutung von mir und nicht bestätigt.
    Von diese vier Anschlüssen können aber nur zwei gleichzeitig benutzt werden. Zum Auswählen der Anschlüsse befinden sich auf der Karte Jumper.

    kann ich bestätigen. Vorher wurde nichts angezeigt, erst als ich die Jumoer auf extern umgestellt hatte!

    Leider sehe ich die SSD nicht und weiß im Moment an dieser Stelle auch nicht weiter. Noch die entsprechenden Einträge aus dmesg

    rock64@rockpro64:~$ sudo dmesg | grep -E "pci"
    [    0.502571] of_get_named_gpiod_flags: parsed 'gpio' property of node '/vcc3v3-pcie-regulator[0]' - status (0)
    [    0.502619] reg-fixed-voltage vcc3v3-pcie-regulator: Looking up vin-supply from device tree
    [    0.502657] vcc3v3_pcie: supplied by dc_12v
    [    0.502723] vcc3v3_pcie: 3300 mV 
    [    0.502878] reg-fixed-voltage vcc3v3-pcie-regulator: vcc3v3_pcie supplying 3300000uV
    [    0.906753] phy phy-pcie-phy.5: Looking up phy-supply from device tree
    [    0.906762] phy phy-pcie-phy.5: Looking up phy-supply property in node /pcie-phy failed
    [    0.908221] rockchip-pcie f8000000.pcie: GPIO lookup for consumer ep
    [    0.908231] rockchip-pcie f8000000.pcie: using device tree for GPIO lookup
    [    0.908258] of_get_named_gpiod_flags: parsed 'ep-gpios' property of node '/pcie@f8000000[0]' - status (0)
    [    0.908533] rockchip-pcie f8000000.pcie: Looking up vpcie3v3-supply from device tree
    [    0.908622] rockchip-pcie f8000000.pcie: Looking up vpcie1v8-supply from device tree
    [    0.908633] rockchip-pcie f8000000.pcie: Looking up vpcie1v8-supply property in node /pcie@f8000000 failed
    [    0.908646] rockchip-pcie f8000000.pcie: no vpcie1v8 regulator found
    [    0.908671] rockchip-pcie f8000000.pcie: Looking up vpcie0v9-supply from device tree
    [    0.908681] rockchip-pcie f8000000.pcie: Looking up vpcie0v9-supply property in node /pcie@f8000000 failed
    [    0.908692] rockchip-pcie f8000000.pcie: no vpcie0v9 regulator found
    [    0.929331] rockchip-pcie f8000000.pcie: invalid power supply
    [    0.965700] PCI host bridge /pcie@f8000000 ranges:
    [    0.966078] rockchip-pcie f8000000.pcie: PCI host bridge to bus 0000:00
    [    0.966105] pci_bus 0000:00: root bus resource [bus 00-1f]
    [    0.966128] pci_bus 0000:00: root bus resource [mem 0xfa000000-0xfbdfffff]
    [    0.966152] pci_bus 0000:00: root bus resource [io  0x0000-0xfffff] (bus address [0xfbe00000-0xfbefffff])
    [    0.966211] pci 0000:00:00.0: [1d87:0100] type 01 class 0x060400
    [    0.966330] pci 0000:00:00.0: supports D1
    [    0.966339] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
    [    0.966581] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
    [    0.966733] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-1f] (conflicts with (null) [bus 00-1f])
    [    0.966767] pci 0000:01:00.0: [1b21:0612] type 00 class 0x010601
    [    0.966810] pci 0000:01:00.0: reg 0x10: initial BAR value 0x00000000 invalid
    [    0.966834] pci 0000:01:00.0: reg 0x10: [io  size 0x0008]
    [    0.966850] pci 0000:01:00.0: reg 0x14: initial BAR value 0x00000000 invalid
    [    0.966871] pci 0000:01:00.0: reg 0x14: [io  size 0x0004]
    [    0.966887] pci 0000:01:00.0: reg 0x18: initial BAR value 0x00000000 invalid
    [    0.966908] pci 0000:01:00.0: reg 0x18: [io  size 0x0008]
    [    0.966923] pci 0000:01:00.0: reg 0x1c: initial BAR value 0x00000000 invalid
    [    0.966945] pci 0000:01:00.0: reg 0x1c: [io  size 0x0004]
    [    0.966960] pci 0000:01:00.0: reg 0x20: initial BAR value 0x00000000 invalid
    [    0.966981] pci 0000:01:00.0: reg 0x20: [io  size 0x0020]
    [    0.966997] pci 0000:01:00.0: reg 0x24: [mem 0x00000000-0x000001ff]
    [    0.967013] pci 0000:01:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref]
    [    0.968329] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
    [    0.968363] pci 0000:00:00.0: BAR 8: assigned [mem 0xfa000000-0xfa0fffff]
    [    0.968392] pci 0000:01:00.0: BAR 6: assigned [mem 0xfa000000-0xfa00ffff pref]
    [    0.968426] pci 0000:01:00.0: BAR 5: assigned [mem 0xfa010000-0xfa0101ff]
    [    0.968452] pci 0000:01:00.0: BAR 4: no space for [io  size 0x0020]
    [    0.968474] pci 0000:01:00.0: BAR 4: failed to assign [io  size 0x0020]
    [    0.968496] pci 0000:01:00.0: BAR 0: no space for [io  size 0x0008]
    [    0.968517] pci 0000:01:00.0: BAR 0: failed to assign [io  size 0x0008]
    [    0.968539] pci 0000:01:00.0: BAR 2: no space for [io  size 0x0008]
    [    0.968560] pci 0000:01:00.0: BAR 2: failed to assign [io  size 0x0008]
    [    0.968581] pci 0000:01:00.0: BAR 1: no space for [io  size 0x0004]
    [    0.968602] pci 0000:01:00.0: BAR 1: failed to assign [io  size 0x0004]
    [    0.968623] pci 0000:01:00.0: BAR 3: no space for [io  size 0x0004]
    [    0.968644] pci 0000:01:00.0: BAR 3: failed to assign [io  size 0x0004]
    [    0.968667] pci 0000:00:00.0: PCI bridge to [bus 01]
    [    0.968692] pci 0000:00:00.0:   bridge window [mem 0xfa000000-0xfa0fffff]
    [    0.968764] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
    [    0.969009] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt
    [    0.969032] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
    [    0.969057] pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded
    [    0.969161] aer 0000:00:00.0:pcie02: service driver aer loaded
    [    1.225528] ehci-pci: EHCI PCI platform driver
    
  • Es gibt Neuigkeiten. Keine Kernel-Panic mehr 🙂

    0_1528631856238_nvme_red_led.jpg

    Aktuell nutze ich diesen Kernel

    rock64@rockpro64:/sys/bus/pci/devices/0000:00:00.0$ uname -a
    Linux rockpro64 4.17.0-rc6-1017-ayufan-g53b5bbc73a0e #1 SMP PREEMPT Sun Jun 10 10:44:37 UTC 2018 aarch64 aarch64 aarch64 GNU/Linux
    

    Ok, das Ding bootet sauber. Die Spannungen scheinen immer noch nicht sauber geschaltet zu werden. 😞

    rock64@rockpro64:/sys/bus/pci/devices/0000:00:00.0$ sudo dmesg | grep -E "pcie"
    [    1.618796] vcc3v3_pcie: supplied by dc_12v
    [    3.359754] vcc3v3_pcie: disabling
    [    3.690367] rockchip-pcie f8000000.pcie: no vpcie12v regulator found
    [    3.691031] rockchip-pcie f8000000.pcie: no vpcie1v8 regulator found
    [    3.692132] rockchip-pcie f8000000.pcie: no vpcie0v9 regulator found
    [    3.761584] PCI: OF: host bridge /pcie@f8000000 ranges:
    [    3.761870] rockchip-pcie f8000000.pcie: PCI host bridge to bus 0000:00
    [    3.824133] Modules linked in: phy_rockchip_pcie rockchipdrm(+) analogix_dp
    [    3.827294] pc : rockchip_pcie_rd_conf+0xa8/0x1b0
    [    3.827784] lr : rockchip_pcie_rd_conf+0x144/0x1b0
    [    3.837868]  rockchip_pcie_rd_conf+0xa8/0x1b0
    [    3.875349]  rockchip_pcie_probe+0x9cc/0xc48
    

    lspci gibt das hier aus

    rock64@rockpro64:/sys/bus/pci/devices/0000:00:00.0$ lspci
    pcilib: Cannot open /sys/bus/pci/devices/0000:00:00.0/config
    lspci: Unable to read the standard configuration space header of device 0000:00:00.0
    

    Meine Recherche im Internet ergab, das es wohl an fehlenden/falschen Kerneloptionen liegt. Ok, da bin ich raus 🙂

    dmesg Log

    Zusatzbemerkung: Aktuell 6 Watt Stromaufnahme.

  • Neues Image

    rock64@rockpro64:/mnt$ uname -a
    Linux rockpro64 4.4.126-rockchip-ayufan-257 #1 SMP Sun Jun 10 18:30:43 UTC 2018 aarch64 aarch64 aarch64 GNU/Linux
    

    Bootet einwandfrei. Mal schauen was lspci nun macht.

    rock64@rockpro64:~$ lspci
    00:00.0 PCI bridge: Rockchip Inc. RK3399 PCI Express Root Port Device 0100
    01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961
    

    Sieht schon mal besser aus! 😉

    fdisk gibt folgendes aus

    rock64@rockpro64:~$ sudo fdisk -l
    [sudo] password for rock64: 
    Disk /dev/ram0: 4 MiB, 4194304 bytes, 8192 sectors
    Units: sectors of 1 * 512 = 512 bytes
    Sector size (logical/physical): 512 bytes / 4096 bytes
    I/O size (minimum/optimal): 4096 bytes / 4096 bytes
    
    
    Disk /dev/mmcblk0: 14.7 GiB, 15811477504 bytes, 30881792 sectors
    Units: sectors of 1 * 512 = 512 bytes
    Sector size (logical/physical): 512 bytes / 512 bytes
    I/O size (minimum/optimal): 512 bytes / 512 bytes
    Disklabel type: gpt
    Disk identifier: 298096AF-4287-4988-B53A-24CDE27C1C8D
    
    Device          Start      End  Sectors  Size Type
    /dev/mmcblk0p1     64     8063     8000  3.9M Linux filesystem
    /dev/mmcblk0p2   8064     8191      128   64K Linux filesystem
    /dev/mmcblk0p3   8192    16383     8192    4M Linux filesystem
    /dev/mmcblk0p4  16384    24575     8192    4M Linux filesystem
    /dev/mmcblk0p5  24576    32767     8192    4M Linux filesystem
    /dev/mmcblk0p6  32768   262143   229376  112M Microsoft basic data
    /dev/mmcblk0p7 262144 30881758 30619615 14.6G Linux filesystem
    
    
    Disk /dev/nvme0n1: 232.9 GiB, 250059350016 bytes, 488397168 sectors
    Units: sectors of 1 * 512 = 512 bytes
    Sector size (logical/physical): 512 bytes / 512 bytes
    I/O size (minimum/optimal): 512 bytes / 512 bytes
    

    Yeah, da ist sie. Disk /dev/nvme0n1

    Mehr Info's

    rock64@rockpro64:~$ sudo lspci -vvv
    00:00.0 PCI bridge: Rockchip Inc. RK3399 PCI Express Root Port Device 0100 (prog-if 00 [Normal decode])
    	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
    	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ <TAbort+ <MAbort+ >SERR+ <PERR+ INTx-
    	Latency: 0
    	Interrupt: pin A routed to IRQ 238
    	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
    	I/O behind bridge: 00000000-00000fff
    	Memory behind bridge: fa000000-fa0fffff
    	Prefetchable memory behind bridge: 00000000-000fffff
    	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
    	BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
    		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
    	Capabilities: [80] Power Management version 3
    		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-)
    		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME+
    	Capabilities: [90] MSI: Enable+ Count=1/1 Maskable+ 64bit+
    		Address: 00000000fee30040  Data: 0000
    		Masking: 00000000  Pending: 00000000
    	Capabilities: [b0] MSI-X: Enable- Count=1 Masked-
    		Vector table: BAR=0 offset=00000000
    		PBA: BAR=0 offset=00000008
    	Capabilities: [c0] Express (v2) Root Port (Slot+), MSI 00
    		DevCap:	MaxPayload 256 bytes, PhantFunc 0
    			ExtTag- RBE+
    		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
    			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
    			MaxPayload 128 bytes, MaxReadReq 512 bytes
    		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
    		LnkCap:	Port #0, Speed 5GT/s, Width x4, ASPM L1, Exit Latency L0s <256ns, L1 <8us
    			ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp+
    		LnkCtl:	ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk-
    			ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+
    		LnkSta:	Speed 5GT/s, Width x2, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
    		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
    			Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
    		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
    			Control: AttnInd Off, PwrInd Off, Power+ Interlock-
    		SltSta:	Status: AttnBtn- PowerFlt- MRL+ CmdCplt- PresDet- Interlock-
    			Changed: MRL- PresDet- LinkState-
    		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
    		RootCap: CRSVisible-
    		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
    		DevCap2: Completion Timeout: Range B, TimeoutDis+, LTR+, OBFF Via message ARIFwd+
    		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
    		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
    			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
    			 Compliance De-emphasis: -6dB
    		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
    			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
    	Capabilities: [100 v2] Advanced Error Reporting
    		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
    		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
    		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
    		AERCap:	First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
    	Capabilities: [274 v1] Transaction Processing Hints
    		Interrupt vector mode supported
    		Device specific mode supported
    		Steering table in TPH capability structure
    	Kernel driver in use: pcieport
    
    01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961 (prog-if 02 [NVM Express])
    	Subsystem: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961
    	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
    	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    	Latency: 0
    	Interrupt: pin A routed to IRQ 237
    	Region 0: Memory at fa000000 (64-bit, non-prefetchable) [size=16K]
    	Capabilities: [40] Power Management version 3
    		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
    		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
    	Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+
    		Address: 0000000000000000  Data: 0000
    	Capabilities: [70] Express (v2) Endpoint, MSI 00
    		DevCap:	MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
    			ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
    		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
    			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset-
    			MaxPayload 128 bytes, MaxReadReq 512 bytes
    		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
    		LnkCap:	Port #0, Speed 8GT/s, Width x4, ASPM L1, Exit Latency L0s unlimited, L1 <64us
    			ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+
    		LnkCtl:	ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk-
    			ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
    		LnkSta:	Speed 5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
    		DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR+, OBFF Not Supported
    		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
    		LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
    			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
    			 Compliance De-emphasis: -6dB
    		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
    			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
    	Capabilities: [b0] MSI-X: Enable+ Count=8 Masked-
    		Vector table: BAR=0 offset=00003000
    		PBA: BAR=0 offset=00002000
    	Capabilities: [100 v2] Advanced Error Reporting
    		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
    		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
    		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
    		AERCap:	First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
    	Capabilities: [148 v1] Device Serial Number 00-00-00-00-00-00-00-00
    	Capabilities: [158 v1] Power Budgeting <?>
    	Capabilities: [168 v1] #19
    	Capabilities: [188 v1] Latency Tolerance Reporting
    		Max snoop latency: 0ns
    		Max no snoop latency: 0ns
    	Capabilities: [190 v1] L1 PM Substates
    		L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
    			  PortCommonModeRestoreTime=10us PortTPowerOnTime=10us
    		L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
    			   T_CommonMode=0us LTR1.2_Threshold=0ns
    		L1SubCtl2: T_PwrOn=10us
    	Kernel driver in use: nvme
    

    Kurz mal die Platte eingerichtet und formatiert. Kurzer Speedtest

    rock64@rockpro64:/mnt$ sudo dd if=/dev/zero of=sd.img bs=1M count=4096 conv=fdatasync
    4096+0 records in
    4096+0 records out
    4294967296 bytes (4.3 GB, 4.0 GiB) copied, 11.795 s, 364 MB/s
    

    Ganz zufrieden sind wir noch nicht. Die Platte ist nur mit 2 Lanes angeschlossen (x2) müsste aber eigentlich x4 sein. Wäre dann theoretisch doppelte Geschwindigkeit.

    LnkSta:	Speed 5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
    

    Aber, der Kamil macht das. Da bin ich mir sicher. Und ich weiß, das das Entfernen des Widerstandes das Richtige war.

    Yeah, ein netter Erfolg!! DANKE Kamil!

  • Test 1

    sudo iozone -a -g 4000m -s 4000m -i 0 -i 1 -r 4K
    

    Ergebnis

                                                random    random     bkwd    record    stride                                    
                  kB  reclen    write  rewrite    read    reread    read     write     read   rewrite      read   fwrite frewrite    fread  freread
             4096000       4   354726   560395   658231   671916   
    

    Test 2

    sudo iozone -a -g 4000m -s 4000m -i 0 -i 1 -r 1024K
    

    Ergebnis

       random    random     bkwd    record    stride                                    
                  kB  reclen    write  rewrite    read    reread    read     write     read   rewrite      read   fwrite frewrite    fread  freread
             4096000    1024   383501   564600   629695   642066      
    

    Test 3

    sudo iozone -O -i 0 -i 1 -i 2 -e -+n -r 4K -s 2000m
    

    Ergebnis

                                                          random    random     bkwd    record    stride                                    
                  kB  reclen    write  rewrite    read    reread    read     write     read   rewrite      read   fwrite frewrite    fread  freread
             2048000       4    85084        0   379800        0   285656   113240
    
  • Jetzt habe ich noch mal meinen Mainline gebootet und was sehe ich?

    Kernel

    rock64@rockpro64:~$ uname -a
    Linux rockpro64 4.17.0-rc6-1017-ayufan-g53b5bbc73a0e #1 SMP PREEMPT Sun Jun 10 10:44:37 UTC 2018 aarch64 aarch64 aarch64 GNU/Linux
    

    PCIe

    rock64@rockpro64:~$ lspci
    00:00.0 PCI bridge: Rockchip Inc. RK3399 PCI Express Root Port Device 0100
    01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961
    

    Was das? War doch die ganze Zeit nicht da.

    Speedtest

    rock64@rockpro64:/mnt$ sudo dd if=/dev/zero of=sd.img bs=1M count=4096 conv=fdatasync
    4096+0 records in
    4096+0 records out
    4294967296 bytes (4.3 GB, 4.0 GiB) copied, 16.9415 s, 254 MB/s
    

    Was langsamer als beim 4.4er

    rock64@rockpro64:/mnt$ sudo lspci -vvv
    00:00.0 PCI bridge: Rockchip Inc. RK3399 PCI Express Root Port Device 0100 (prog-if 00 [Normal decode])
    	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
    	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    	Latency: 0
    	Interrupt: pin A routed to IRQ 229
    	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
    	I/O behind bridge: 00000000-00000fff
    	Memory behind bridge: fa000000-fa0fffff
    	Prefetchable memory behind bridge: 00000000-000fffff
    	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
    	BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
    		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
    	Capabilities: [80] Power Management version 3
    		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-)
    		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
    	Capabilities: [90] MSI: Enable- Count=1/1 Maskable+ 64bit+
    		Address: 0000000000000000  Data: 0000
    		Masking: 00000000  Pending: 00000000
    	Capabilities: [b0] MSI-X: Enable- Count=1 Masked-
    		Vector table: BAR=0 offset=00000000
    		PBA: BAR=0 offset=00000008
    	Capabilities: [c0] Express (v2) Root Port (Slot+), MSI 00
    		DevCap:	MaxPayload 256 bytes, PhantFunc 0
    			ExtTag- RBE+
    		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
    			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
    			MaxPayload 256 bytes, MaxReadReq 512 bytes
    		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
    		LnkCap:	Port #0, Speed 2.5GT/s, Width x4, ASPM L1, Exit Latency L0s <256ns, L1 <8us
    			ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp+
    		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- CommClk+
    			ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+
    		LnkSta:	Speed 2.5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
    		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
    			Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
    		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
    			Control: AttnInd Off, PwrInd Off, Power+ Interlock-
    		SltSta:	Status: AttnBtn- PowerFlt- MRL+ CmdCplt- PresDet- Interlock-
    			Changed: MRL- PresDet- LinkState-
    		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
    		RootCap: CRSVisible-
    		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
    		DevCap2: Completion Timeout: Range B, TimeoutDis+, LTR+, OBFF Via message ARIFwd+
    		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR+, OBFF Disabled ARIFwd-
    		LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
    			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
    			 Compliance De-emphasis: -6dB
    		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
    			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
    	Capabilities: [100 v2] Advanced Error Reporting
    		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
    		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
    		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
    		AERCap:	First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
    	Capabilities: [274 v1] Transaction Processing Hints
    		Interrupt vector mode supported
    		Device specific mode supported
    		Steering table in TPH capability structure
    	Kernel driver in use: pcieport
    
    01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961 (prog-if 02 [NVM Express])
    	Subsystem: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961
    	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
    	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    	Latency: 0
    	Interrupt: pin A routed to IRQ 229
    	NUMA node: 0
    	Region 0: Memory at fa000000 (64-bit, non-prefetchable) [size=16K]
    	Capabilities: [40] Power Management version 3
    		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
    		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
    	Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+
    		Address: 0000000000000000  Data: 0000
    	Capabilities: [70] Express (v2) Endpoint, MSI 00
    		DevCap:	MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
    			ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
    		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
    			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset-
    			MaxPayload 256 bytes, MaxReadReq 512 bytes
    		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
    		LnkCap:	Port #0, Speed 8GT/s, Width x4, ASPM L1, Exit Latency L0s unlimited, L1 <64us
    			ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+
    		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- CommClk+
    			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
    		LnkSta:	Speed 2.5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
    		DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR+, OBFF Not Supported
    		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR+, OBFF Disabled
    		LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
    			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
    			 Compliance De-emphasis: -6dB
    		LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
    			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
    	Capabilities: [b0] MSI-X: Enable+ Count=8 Masked-
    		Vector table: BAR=0 offset=00003000
    		PBA: BAR=0 offset=00002000
    	Capabilities: [100 v2] Advanced Error Reporting
    		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
    		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
    		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
    		AERCap:	First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
    	Capabilities: [148 v1] Device Serial Number 00-00-00-00-00-00-00-00
    	Capabilities: [158 v1] Power Budgeting <?>
    	Capabilities: [168 v1] #19
    	Capabilities: [188 v1] Latency Tolerance Reporting
    		Max snoop latency: 0ns
    		Max no snoop latency: 0ns
    	Capabilities: [190 v1] L1 PM Substates
    		L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
    			  PortCommonModeRestoreTime=10us PortTPowerOnTime=10us
    		L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
    			   T_CommonMode=0us LTR1.2_Threshold=0ns
    		L1SubCtl2: T_PwrOn=10us
    	Kernel driver in use: nvme
    

    Der Grund müsste das hier sein.

    LnkSta:	Speed 2.5GT/s
    

    Das ist beim 4.4er auf 5GT/s. Ok, ich habe aber schon gesehen, das Kamil da was entsprechendes schon geändert hat, könnte also im nächsten Mainline schon anders sein.

    Was mich jetzt aber interessiert, warum geht das auf einmal!?? Da scheint noch einiges völlig instabil zu sein 🤔

  • Und schwupps ist ein neuer Mainline da.

    rock64@rockpro64:/mnt$ uname -a
    Linux rockpro64 4.17.0-rc6-1019-ayufan-gfafc3e1c913f #1 SMP PREEMPT Tue Jun 12 19:06:59 UTC 2018 aarch64 aarch64 aarch64 GNU/Linux
    

    Speedtest

    rock64@rockpro64:/mnt$ sudo dd if=/dev/zero of=sd77.img bs=1M count=4096 conv=fdatasync
    4096+0 records in
    4096+0 records out
    4294967296 bytes (4.3 GB, 4.0 GiB) copied, 10.8368 s, 396 MB/s
    rock64@rockpro64:/mnt$ sudo dd if=/dev/zero of=sd99.img bs=1M count=4096 conv=fdatasync
    4096+0 records in
    4096+0 records out
    4294967296 bytes (4.3 GB, 4.0 GiB) copied, 10.3943 s, 413 MB/s
    rock64@rockpro64:/mnt$ sudo dd if=/dev/zero of=sd100.img bs=1M count=4096 conv=fdatasync
    4096+0 records in
    4096+0 records out
    4294967296 bytes (4.3 GB, 4.0 GiB) copied, 15.9206 s, 270 MB/s
    

    Stark schwankend!??

    	LnkSta:	Speed 5GT/s, Width x2
    

    Aber, das passt jetzt!

    Übrigens, muss ich ab und zu mehrmals booten bevor ich PCIe habe???

  • Als Ergänzung, die Probleme sind zum großen Teil gefixt. Wir haben mittlerweile x4

    rock64@rockpro64v2_0:~$ sudo lspci -vvv
    [sudo] password for rock64: 
    00:00.0 PCI bridge: Rockchip Inc. RK3399 PCI Express Root Port Device 0100 (prog-if 00 [Normal decode])
    	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
    	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ <TAbort+ <MAbort+ >SERR+ <PERR+ INTx-
    	Latency: 0
    	Interrupt: pin A routed to IRQ 238
    	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
    	I/O behind bridge: 00000000-00000fff
    	Memory behind bridge: fa000000-fa0fffff
    	Prefetchable memory behind bridge: 00000000-000fffff
    	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
    	BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
    		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
    	Capabilities: [80] Power Management version 3
    		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-)
    		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME+
    	Capabilities: [90] MSI: Enable+ Count=1/1 Maskable+ 64bit+
    		Address: 00000000fee30040  Data: 0000
    		Masking: 00000000  Pending: 00000000
    	Capabilities: [b0] MSI-X: Enable- Count=1 Masked-
    		Vector table: BAR=0 offset=00000000
    		PBA: BAR=0 offset=00000008
    	Capabilities: [c0] Express (v2) Root Port (Slot+), MSI 00
    		DevCap:	MaxPayload 256 bytes, PhantFunc 0
    			ExtTag- RBE+
    		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
    			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
    			MaxPayload 128 bytes, MaxReadReq 512 bytes
    		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
    		LnkCap:	Port #0, Speed 5GT/s, Width x4, ASPM L1, Exit Latency L0s <256ns, L1 <8us
    			ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp+
    		LnkCtl:	ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk-
    			ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+
    		LnkSta:	Speed 5GT/s, Width x4, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
    		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
    			Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
    		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
    			Control: AttnInd Off, PwrInd Off, Power+ Interlock-
    		SltSta:	Status: AttnBtn- PowerFlt- MRL+ CmdCplt- PresDet- Interlock-
    			Changed: MRL- PresDet- LinkState-
    		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
    		RootCap: CRSVisible-
    		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
    		DevCap2: Completion Timeout: Range B, TimeoutDis+, LTR+, OBFF Via message ARIFwd+
    		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
    		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
    			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
    			 Compliance De-emphasis: -6dB
    		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
    			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
    	Capabilities: [100 v2] Advanced Error Reporting
    		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
    		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
    		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
    		AERCap:	First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
    	Capabilities: [274 v1] Transaction Processing Hints
    		Interrupt vector mode supported
    		Device specific mode supported
    		Steering table in TPH capability structure
    	Kernel driver in use: pcieport
    
    01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961 (prog-if 02 [NVM Express])
    	Subsystem: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961
    	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
    	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    	Latency: 0
    	Interrupt: pin A routed to IRQ 237
    	Region 0: Memory at fa000000 (64-bit, non-prefetchable) [size=16K]
    	Capabilities: [40] Power Management version 3
    		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
    		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
    	Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+
    		Address: 0000000000000000  Data: 0000
    	Capabilities: [70] Express (v2) Endpoint, MSI 00
    		DevCap:	MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
    			ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
    		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
    			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset-
    			MaxPayload 128 bytes, MaxReadReq 512 bytes
    		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
    		LnkCap:	Port #0, Speed 8GT/s, Width x4, ASPM L1, Exit Latency L0s unlimited, L1 <64us
    			ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+
    		LnkCtl:	ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk-
    			ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
    		LnkSta:	Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
    		DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR+, OBFF Not Supported
    		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
    		LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
    			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
    			 Compliance De-emphasis: -6dB
    		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
    			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
    	Capabilities: [b0] MSI-X: Enable+ Count=8 Masked-
    		Vector table: BAR=0 offset=00003000
    		PBA: BAR=0 offset=00002000
    	Capabilities: [100 v2] Advanced Error Reporting
    		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
    		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
    		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
    		AERCap:	First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
    	Capabilities: [148 v1] Device Serial Number 00-00-00-00-00-00-00-00
    	Capabilities: [158 v1] Power Budgeting <?>
    	Capabilities: [168 v1] #19
    	Capabilities: [188 v1] Latency Tolerance Reporting
    		Max snoop latency: 0ns
    		Max no snoop latency: 0ns
    	Capabilities: [190 v1] L1 PM Substates
    		L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
    			  PortCommonModeRestoreTime=10us PortTPowerOnTime=10us
    		L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
    			   T_CommonMode=0us LTR1.2_Threshold=0ns
    		L1SubCtl2: T_PwrOn=10us
    	Kernel driver in use: nvme
    
    rock64@rockpro64v2_0:~$ 
    

    Booten geht einwandfrei, einziges Problem im Moment. Es gehen nur sehr wenige Karten.

  • Hi
    ist es eigentlich möglich an diesem port ein dedizierte Grafikkarte zu betreiben? eventuell mit einem mining PCiEpress adapter zur Strom versorgung?

  • @Northstar Hallo, laut meinen Info's nicht, hat irgendwas mit der Speicheradressierung zu tuen. Und Grafikkarten benötigen wohl zu viel. Das ist das, was ich bei den vielen Diskussionen im IRC so aufgeschnappt habe.

    Ich habe es auch schon mal genauso probiert - natürlich ohne Erfolg.

  • FTDI Support (ayufan Kernel 5.0)

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    Hi, leider habe ich bisher keine Antwort von Kamil erhalten. So habe ich selbst mal einen Kernel kompiliert. Als Vorlage habe ich den Ayufan 5.3 rc4 1118 genommen. Also gleiche config nur zusätzlich den FTDI und den CH341 (Arduino clones) Treiber hinzugefügt. Könnt ihr ja mal bei Lust und Laune testen. Für meine Zwecke funktioniert er gut.
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    user: rock64 pw: rock64
  • stretch-minimal-rockpro64

    Verschoben Linux
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    FrankMF

    Mal ein Test was der Speicher so kann.

    rock64@rockpro64:~/tinymembench$ ./tinymembench tinymembench v0.4.9 (simple benchmark for memory throughput and latency) ========================================================================== == Memory bandwidth tests == == == == Note 1: 1MB = 1000000 bytes == == Note 2: Results for 'copy' tests show how many bytes can be == == copied per second (adding together read and writen == == bytes would have provided twice higher numbers) == == Note 3: 2-pass copy means that we are using a small temporary buffer == == to first fetch data into it, and only then write it to the == == destination (source -> L1 cache, L1 cache -> destination) == == Note 4: If sample standard deviation exceeds 0.1%, it is shown in == == brackets == ========================================================================== C copy backwards : 2812.7 MB/s C copy backwards (32 byte blocks) : 2811.9 MB/s C copy backwards (64 byte blocks) : 2632.8 MB/s C copy : 2667.2 MB/s C copy prefetched (32 bytes step) : 2633.5 MB/s C copy prefetched (64 bytes step) : 2640.8 MB/s C 2-pass copy : 2509.8 MB/s C 2-pass copy prefetched (32 bytes step) : 2431.6 MB/s C 2-pass copy prefetched (64 bytes step) : 2424.1 MB/s C fill : 4887.7 MB/s (0.5%) C fill (shuffle within 16 byte blocks) : 4883.0 MB/s C fill (shuffle within 32 byte blocks) : 4889.3 MB/s C fill (shuffle within 64 byte blocks) : 4889.2 MB/s --- standard memcpy : 2807.3 MB/s standard memset : 4890.4 MB/s (0.3%) --- NEON LDP/STP copy : 2803.7 MB/s NEON LDP/STP copy pldl2strm (32 bytes step) : 2802.1 MB/s NEON LDP/STP copy pldl2strm (64 bytes step) : 2800.7 MB/s NEON LDP/STP copy pldl1keep (32 bytes step) : 2745.5 MB/s NEON LDP/STP copy pldl1keep (64 bytes step) : 2745.8 MB/s NEON LD1/ST1 copy : 2801.9 MB/s NEON STP fill : 4888.9 MB/s (0.3%) NEON STNP fill : 4850.1 MB/s ARM LDP/STP copy : 2803.8 MB/s ARM STP fill : 4893.0 MB/s (0.5%) ARM STNP fill : 4851.7 MB/s ========================================================================== == Framebuffer read tests. == == == == Many ARM devices use a part of the system memory as the framebuffer, == == typically mapped as uncached but with write-combining enabled. == == Writes to such framebuffers are quite fast, but reads are much == == slower and very sensitive to the alignment and the selection of == == CPU instructions which are used for accessing memory. == == == == Many x86 systems allocate the framebuffer in the GPU memory, == == accessible for the CPU via a relatively slow PCI-E bus. Moreover, == == PCI-E is asymmetric and handles reads a lot worse than writes. == == == == If uncached framebuffer reads are reasonably fast (at least 100 MB/s == == or preferably >300 MB/s), then using the shadow framebuffer layer == == is not necessary in Xorg DDX drivers, resulting in a nice overall == == performance improvement. For example, the xf86-video-fbturbo DDX == == uses this trick. == ========================================================================== NEON LDP/STP copy (from framebuffer) : 602.5 MB/s NEON LDP/STP 2-pass copy (from framebuffer) : 551.6 MB/s NEON LD1/ST1 copy (from framebuffer) : 667.1 MB/s NEON LD1/ST1 2-pass copy (from framebuffer) : 605.6 MB/s ARM LDP/STP copy (from framebuffer) : 445.3 MB/s ARM LDP/STP 2-pass copy (from framebuffer) : 428.8 MB/s ========================================================================== == Memory latency test == == == == Average time is measured for random memory accesses in the buffers == == of different sizes. The larger is the buffer, the more significant == == are relative contributions of TLB, L1/L2 cache misses and SDRAM == == accesses. For extremely large buffer sizes we are expecting to see == == page table walk with several requests to SDRAM for almost every == == memory access (though 64MiB is not nearly large enough to experience == == this effect to its fullest). == == == == Note 1: All the numbers are representing extra time, which needs to == == be added to L1 cache latency. The cycle timings for L1 cache == == latency can be usually found in the processor documentation. == == Note 2: Dual random read means that we are simultaneously performing == == two independent memory accesses at a time. In the case if == == the memory subsystem can't handle multiple outstanding == == requests, dual random read has the same timings as two == == single reads performed one after another. == ========================================================================== block size : single random read / dual random read 1024 : 0.0 ns / 0.0 ns 2048 : 0.0 ns / 0.0 ns 4096 : 0.0 ns / 0.0 ns 8192 : 0.0 ns / 0.0 ns 16384 : 0.0 ns / 0.0 ns 32768 : 0.0 ns / 0.0 ns 65536 : 4.5 ns / 7.2 ns 131072 : 6.8 ns / 9.7 ns 262144 : 9.8 ns / 12.8 ns 524288 : 11.4 ns / 14.7 ns 1048576 : 16.0 ns / 22.6 ns 2097152 : 114.0 ns / 175.3 ns 4194304 : 161.7 ns / 219.9 ns 8388608 : 190.7 ns / 241.5 ns 16777216 : 205.3 ns / 250.5 ns 33554432 : 212.9 ns / 255.5 ns 67108864 : 222.3 ns / 271.1 ns